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authorAngel Pons <th3fanbus@gmail.com>2021-09-27 12:02:50 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-09-29 20:40:32 +0000
commitefe57ebd40475d899e7585c02822cd0baebb8d30 (patch)
treebcb05a0a95303f777a5a1f54570f117710eac31a /src/soc/intel/skylake
parentae364008a7c13b3d4951acbf3554f16c9fb89d1b (diff)
soc/intel: Rename GNVS struct member to match ASL
Rename the `ecps` GNVS struct member to `epcs` to match the name in ASL. Change-Id: I1f6b97309eea75e7dbb4e5e664660df05ec0845e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57979 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/skylake')
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index f4868d903f..6d5e17256c 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -41,7 +41,7 @@ struct __packed global_nvs {
u16 u2we; /* 0x3f - USB2 Wake Enable Bitmap */
u8 u3we; /* 0x41 - USB3 Wake Enable Bitmap */
u8 uior; /* 0x42 - UART debug controller init on S3 resume */
- u8 ecps; /* 0x43 - SGX Enabled status */
+ u8 epcs; /* 0x43 - SGX Enabled status */
u64 emna; /* 0x44 - 0x4B EPC base address */
u64 elng; /* 0x4C - 0x53 EPC Length */
u64 a4gb; /* 0x54 - 0x5B Base of above 4GB MMIO Resource */