From efe57ebd40475d899e7585c02822cd0baebb8d30 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 27 Sep 2021 12:02:50 +0200 Subject: soc/intel: Rename GNVS struct member to match ASL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename the `ecps` GNVS struct member to `epcs` to match the name in ASL. Change-Id: I1f6b97309eea75e7dbb4e5e664660df05ec0845e Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/57979 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/soc/intel/skylake/include/soc/nvs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/skylake') diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h index f4868d903f..6d5e17256c 100644 --- a/src/soc/intel/skylake/include/soc/nvs.h +++ b/src/soc/intel/skylake/include/soc/nvs.h @@ -41,7 +41,7 @@ struct __packed global_nvs { u16 u2we; /* 0x3f - USB2 Wake Enable Bitmap */ u8 u3we; /* 0x41 - USB3 Wake Enable Bitmap */ u8 uior; /* 0x42 - UART debug controller init on S3 resume */ - u8 ecps; /* 0x43 - SGX Enabled status */ + u8 epcs; /* 0x43 - SGX Enabled status */ u64 emna; /* 0x44 - 0x4B EPC base address */ u64 elng; /* 0x4C - 0x53 EPC Length */ u64 a4gb; /* 0x54 - 0x5B Base of above 4GB MMIO Resource */ -- cgit v1.2.3