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authorAamir Bohra <aamir.bohra@intel.com>2017-06-02 11:56:14 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-05 00:30:11 +0200
commit1041d399cbbae9042a021502f9e105b078f5046e (patch)
tree43fc598d654fe3df45379efdce6681770a57e7bc /src/soc/intel/skylake/tsc_freq.c
parent5391e554e190d746ae54d09cd97c313736a04027 (diff)
soc/intel/skylake: Add config for cpu base clock frequency
Add config for cpu base clock frequency(Mhz) and replace current refrence from soc/cpu.h with config option. Change-Id: Idf8e85f7ae6d965fa987a4f5c4905503ee354d69 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/20016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/tsc_freq.c')
-rw-r--r--src/soc/intel/skylake/tsc_freq.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/tsc_freq.c b/src/soc/intel/skylake/tsc_freq.c
index 9ebe3cb382..8a4ff461b2 100644
--- a/src/soc/intel/skylake/tsc_freq.c
+++ b/src/soc/intel/skylake/tsc_freq.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <soc/cpu.h>
#include <soc/msr.h>
unsigned long tsc_freq_mhz(void)
@@ -25,5 +24,5 @@ unsigned long tsc_freq_mhz(void)
msr_t platform_info;
platform_info = rdmsr(MSR_PLATFORM_INFO);
- return CPU_BCLK * ((platform_info.lo >> 8) & 0xff);
+ return CONFIG_CPU_BCLK_MHZ * ((platform_info.lo >> 8) & 0xff);
}