diff options
| author | Shaunak Saha <shaunak.saha@intel.com> | 2017-07-08 01:08:40 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-05 21:11:39 +0000 |
| commit | d3476809955ffb69447cc02a5ea893ebd1da3eb3 (patch) | |
| tree | 9ba3421063935064df6974b4879af4dc1b64fe83 /src/soc/intel/skylake/smi.c | |
| parent | f073872e22728fe8ade85022740af95cc129e9a5 (diff) | |
soc/intel/skylake: Add support in SKL for PMC common code
Change-Id: I3742f9c22d990edd918713155ae0bb1853663b6f
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/20499
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/smi.c')
| -rw-r--r-- | src/soc/intel/skylake/smi.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c index feddf5084c..23b8ce8e0c 100644 --- a/src/soc/intel/skylake/smi.c +++ b/src/soc/intel/skylake/smi.c @@ -23,6 +23,7 @@ #include <cpu/cpu.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> +#include <intelblocks/pmclib.h> #include <string.h> #include <soc/iomap.h> #include <soc/pch.h> @@ -45,18 +46,18 @@ void southbridge_smm_clear_state(void) printk(BIOS_DEBUG, "\n"); /* Dump and clear status registers */ - clear_smi_status(); - clear_pm1_status(); - clear_tco_status(); - clear_gpe_status(); + pmc_clear_smi_status(); + pmc_clear_pm1_status(); + pmc_clear_tco_status(); + pmc_clear_gpe_status(); } void southbridge_smm_enable_smi(void) { printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ - enable_pm1(GBL_EN); - disable_gpe(PME_B0_EN); + pmc_enable_pm1(GBL_EN); + pmc_disable_gpe(PME_B0_EN); /* * Enable SMI generation: @@ -68,7 +69,7 @@ void southbridge_smm_enable_smi(void) * - on microcontroller writes (io 0x62/0x66) * - on TCO events */ - enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS); + pmc_enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS); } void smm_setup_structures(void *gnvs, void *tcg, void *smi1) @@ -100,7 +101,7 @@ static void pm1_enable_pwrbtn_smi(void *unused) * any shutdowns because of power button presses due to power button * press in resume path. */ - update_pm1_enable(PWRBTN_EN); + pmc_update_pm1_enable(PWRBTN_EN); } BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); |