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| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-24 13:52:39 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-27 03:01:48 +0000 |
| commit | eab9e867330ad55374de283445b65c67ddab941b (patch) | |
| tree | 656b542e0e95ee9ccb1cc62653820cfd4666e808 /src/soc/intel/skylake/sd.c | |
| parent | 8c0dda218391afb95444d180333e552ba347aba7 (diff) | |
soc/intel/icelake: Use GPIO state macros from intelblocks/gpio_defs.h
TEST=Able to build and boot ICLRVP platform.
1) Dump and disassemble DSDT to ensure GRXS function implementation
remain unchanged prior and after this CL.
2) Verify no ACPI error seen while running 'dmesg' from console.
3) abuild --timeless to ensure there are no other functional changes.
Change-Id: Iab4690341bc3da5d8eb249da4d407d84f7d4e706
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45680
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/sd.c')
0 files changed, 0 insertions, 0 deletions