diff options
author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-07-21 14:54:16 -0600 |
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committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-07-22 21:42:57 +0000 |
commit | 1b7dac1bd016a224b49bc5f66e7919d0b69147dd (patch) | |
tree | 949c7a61c0002ca7d27682dc9c5a240eba501b64 /src/soc/intel/skylake/sd.c | |
parent | 7ce0236941df5729fd9cf64c58adeec3657b2815 (diff) |
mb/google/guybrush: Setup EC_IN_RW GPIO and export to payload
EC_IN_RW_OD signal is routed from Google Security Chip to GPIO_91 in the
upcoming hardware build. The existing SD_EX_PRSNT signal is dropped in
the upcoming hardware build because SD7 support is dropped. Export the
EC_IN_RW GPIO for use by payload.
BUG=None
TEST=Build and boot to OS in Guybrush. Ensure that the device can boot
successfully in both recovery and normal mode.
Cq-Depend: chromium:3043702
Change-Id: I8986ba007a2d899c510be61664d90430b8d2d384
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56493
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/sd.c')
0 files changed, 0 insertions, 0 deletions