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author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2016-08-03 19:16:18 +0530 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-06 04:36:46 +0200 |
commit | 5d4194978275c2e3acf09788f80887023ca9ffe8 (patch) | |
tree | 22771dcc9ff6af2beaf643740607c306a799d8a2 /src/soc/intel/skylake/romstage | |
parent | dfb373541b71e4a8a41d1b4b5407c47ca0d9b5bd (diff) |
soc/intel/skylake: Add Kabylake device Ids
Adding kabylake device ids for chip inits.
Skylake and Kabylak do not differ much, the intention
is to support both SoCs in the same code base.
Change-Id: I9ff4c6ca08fe681798001ce81cca2c085ce32325
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/16049
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage')
-rw-r--r-- | src/soc/intel/skylake/romstage/report_platform.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/report_platform.c b/src/soc/intel/skylake/romstage/report_platform.c index c8e2588cd2..e841359f3b 100644 --- a/src/soc/intel/skylake/romstage/report_platform.c +++ b/src/soc/intel/skylake/romstage/report_platform.c @@ -32,6 +32,8 @@ static struct { } cpu_table[] = { { CPUID_SKYLAKE_C0, "Skylake C0" }, { CPUID_SKYLAKE_D0, "Skylake D0" }, + { CPUID_KABYLAKE_G0, "Kabylake G0" }, + { CPUID_KABYLAKE_H0, "Kabylake H0" }, }; static struct { @@ -41,6 +43,8 @@ static struct { { MCH_SKYLAKE_ID_U, "Skylake-U" }, { MCH_SKYLAKE_ID_Y, "Skylake-Y" }, { MCH_SKYLAKE_ID_ULX, "Skylake-ULX" }, + { MCH_KABYLAKE_ID_U, "Kabylake-U" }, + { MCH_KABYLAKE_ID_Y, "Kabylake-Y" }, }; static struct { @@ -51,6 +55,8 @@ static struct { { PCH_SPT_LP_U_BASE, "Skylake-U Base" }, { PCH_SPT_LP_U_PREMIUM, "Skylake-U Premium" }, { PCH_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" }, + { PCH_KBL_LP_U_PREMIUM, "Kabylake-U Premium" }, + { PCH_KBL_LP_Y_PREMIUM, "Kabylake-Y Premium" }, }; static struct { |