diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-11-22 15:38:19 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-02 03:20:07 +0000 |
| commit | 2153ea5b83461547c854b2cd784b1638a3feeb31 (patch) | |
| tree | 28dc9c5dc50ff7df51aef6bb11384654f6937b26 /src/soc/intel/skylake/romstage | |
| parent | 07f065a3cee7ead321be64baefa1f1601d3a8827 (diff) | |
soc/intel/common/block: Add Intel common PMC controller support for KBL, APL
SoC needs to select specific macros to compile commom PMC code.
TEST=Build and boot KBL (soraka/eve), APL (reef)
Change-Id: Iacc8da986c01e9ac7516643dafc6d932ebe0ee5e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/romstage')
| -rw-r--r-- | src/soc/intel/skylake/romstage/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/pmc.c | 30 |
2 files changed, 0 insertions, 31 deletions
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 6dbe718e0b..8bfbfea66a 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,5 +1,4 @@ romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += car_stage.S -romstage-y += pmc.c romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage_fsp20.c romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/pmc.c b/src/soc/intel/skylake/romstage/pmc.c deleted file mode 100644 index e9d06f2c31..0000000000 --- a/src/soc/intel/skylake/romstage/pmc.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <soc/pci_devs.h> -#include <soc/pm.h> - -void pmc_set_disb(void) -{ - /* Set the DISB after DRAM init */ - u32 disb_val = 0; - pci_devfn_t dev = PCH_DEV_PMC; - disb_val = pci_read_config32(dev, GEN_PMCON_A); - disb_val |= DISB; - - /* Don't clear bits that are write-1-to-clear */ - disb_val &= ~(GBL_RST_STS | MS4V); - pci_write_config32(dev, GEN_PMCON_A, disb_val); -} |