skylake: Remove dead code

Remove dead code not called by any part of coreboot.

BRANCH=none
BUG=None
TEST=Build and run on skylake

Change-Id: I3d457a196d12d03340bceb444d1d6c95afef13df
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 58ea135813afeef773f37023fda58f36d544beef
Original-Change-Id: Id8f4591f20d41f875348c6583618bbcaaf9d9a3a
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/294953
Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11544
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 0 insertions, 20 deletions

diff --git a/src/soc/intel/skylake/romstage/spi.c b/src/soc/intel/skylake/romstage/spi.c
index 2194d21f58..41a144b165 100644
--- a/src/soc/intel/skylake/romstage/spi.c
+++ b/src/soc/intel/skylake/romstage/spi.c
@@ -21,26 +21,6 @@
 #include <soc/flash_controller.h>
 #include <soc/romstage.h>
 
-int early_spi_read(u32 offset, u32 size, u8 *buffer)
-{
-	u32 current = 0;
-
-	spi_init();
-	while (size > 0) {
-		u8 count = (size < 64) ? size : 64;
-		/* sending NULL for spiflash struct parameter since we are not
-		 * calling HWSEQ read() call via Probe.
-		 */
-		if (pch_hwseq_read(NULL, offset + current, count,
-				   buffer + current) != 0)
-			return -1;
-		size -= count;
-		current += count;
-	}
-
-	return 0;
-}
-
 /*
  * Minimal set of commands to read WPSR from SPI.
  * Returns 0 on success, < 0 on failure.