diff options
author | Shaunak Saha <shaunak.saha@intel.com> | 2017-07-08 01:08:40 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-05 21:11:39 +0000 |
commit | d3476809955ffb69447cc02a5ea893ebd1da3eb3 (patch) | |
tree | 9ba3421063935064df6974b4879af4dc1b64fe83 /src/soc/intel/skylake/romstage/romstage.c | |
parent | f073872e22728fe8ade85022740af95cc129e9a5 (diff) |
soc/intel/skylake: Add support in SKL for PMC common code
Change-Id: I3742f9c22d990edd918713155ae0bb1853663b6f
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/20499
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage.c')
-rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 50c050ef45..215b07c074 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -29,6 +29,7 @@ #include <device/pci_def.h> #include <elog.h> #include <intelblocks/fast_spi.h> +#include <intelblocks/pmclib.h> #include <reset.h> #include <romstage_handoff.h> #include <soc/pci_devs.h> @@ -256,3 +257,13 @@ void soc_after_ram_init(struct romstage_params *params) */ pmc_set_disb(); } + +struct chipset_power_state *fill_power_state(void) +{ + struct chipset_power_state *ps; + + ps = pmc_get_power_state(); + pmc_fill_power_state(ps); + + return ps; +} |