diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-07-13 09:34:37 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-21 20:05:26 +0200 |
| commit | 356cabbe35dd2e1c05f9e76c6f079b08e1c97ed8 (patch) | |
| tree | 58908c630ceb8b4e603f41d894326024b34856a8 /src/soc/intel/skylake/romstage/romstage.c | |
| parent | 0893e29755db3e94ee41af7ebf8a007a83c6ac50 (diff) | |
skylake: Show SPI controller if enabled in devicetree.cb
Unhide the SPI controller PCI device if it is enabled in
devicetree.cb so flashrom can do its job.
BUG=chrome-os-partner:37711
BRANCH=none
TEST=run flashrom -r on glados
Change-Id: Ie567f970149700d29df0ae09db4962f36cf24219
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 172eac55ad6134fe5e347e37c055b383e3b03245
Original-Change-Id: Ia77b559cc607794aecc25d6d469224d855199568
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/284948
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10986
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage/romstage.c')
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index e8bb877230..6d1310a2ed 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -111,6 +111,10 @@ void soc_memory_init_params(MEMORY_INIT_UPD *params) params->IoBufferOwnership = config->IoBufferOwnership; params->DspEnable = config->DspEnable; params->XdciEnable = config->XdciEnable; + + /* Show SPI controller if enabled in devicetree.cb */ + dev = dev_find_slot(0, PCH_DEVFN_SPI); + params->ShowSpiController = dev->enabled; } void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, |