diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-05-12 18:23:27 -0700 |
---|---|---|
committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-16 17:24:48 +0200 |
commit | 1d14b3e926c15027f9272f1e80b8913fef8cf25d (patch) | |
tree | b3d89ad4bb1b0ea5ac05d1d7dc6cbf26ec93e6c3 /src/soc/intel/skylake/romstage/Makefile.inc | |
parent | b000513741d330947bb832a5835378e35bdfb394 (diff) |
soc/intel: Add Skylake SOC support
Add the files to support the Skylake SOC.
Matches chromium tree at 927026db
BRANCH=none
BUG=None
TEST=Build and run on a Skylake platform
Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10341
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/romstage/Makefile.inc')
-rw-r--r-- | src/soc/intel/skylake/romstage/Makefile.inc | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index ae0f9806fd..52029fcf78 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,13 +1,9 @@ -cpu_incs += $(src)/soc/intel/broadwell/romstage/cache_as_ram.inc - romstage-y += cpu.c romstage-y += pch.c romstage-y += power_state.c -romstage-y += raminit.c romstage-y += report_platform.c romstage-y += romstage.c romstage-y += smbus.c romstage-y += spi.c -romstage-y += stack.c romstage-y += systemagent.c -romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c +romstage-$(CONFIG_INTEL_PCH_UART_CONSOLE) += uart.c |