diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2016-11-17 16:17:37 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-11-22 17:33:33 +0100 |
| commit | dc34fb60b4151a7fad3882cc85dac4379f2d8dd8 (patch) | |
| tree | e1ef39bd00fa5c252fb200a231d6e67915db73fa /src/soc/intel/skylake/pcie.c | |
| parent | c28984d9ea08e7d995ef9fc8064c10ec0c0d9d77 (diff) | |
spi: Get rid of max_transfer_size parameter in spi_slave structure
max_transfer_size is a property of the SPI controller and not of the spi
slave. Also, this is used only on one SoC currently. There is no need to
handle this at the spi flash layer.
This change moves the handling of max_transfer_size to SoC SPI driver
and gets rid of the max_transfer_size parameter.
BUG=None
BRANCH=None
TEST=Compiles successfully.
Change-Id: I19a1d0a83395a58c2bc1614b24518a3220945a60
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17463
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/skylake/pcie.c')
0 files changed, 0 insertions, 0 deletions