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| author | Amanda Huang <amanda_hwang@compal.corp-partner.google.com> | 2021-03-02 14:40:50 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-03-03 15:50:47 +0000 |
| commit | d925ca70d9c0f2f918c578fb0faabfb62b065096 (patch) | |
| tree | a9ad5bcef79cdba1e97e7f6304bc4c2988f48bc8 /src/soc/intel/skylake/nhlt | |
| parent | 1d14ef25f3cb725d682a2fd2738a7002ca9bc23b (diff) | |
util: Add new memory part to LP4x list
Add memory part MT53E2G32D4NQ-046 to LP4x global list. Attributes
are derived from data sheets.Also, regenerate the SPD files for ADL
SoC using the newly added parts.
BUG=b:181378727
TEST=Compared generated SPD with data sheets and checked in SPD
Change-Id: Ic06e9d672a2d3db2b4ea12d15b462843c90db8f6
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/nhlt')
0 files changed, 0 insertions, 0 deletions