diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:20:51 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:32:22 +0200 |
| commit | e0a49147a6e16987bfd267bb76f7cf146ddf03dc (patch) | |
| tree | dc398ce7d03f989f7e7cccd0f696a44514d07c2c /src/soc/intel/skylake/include | |
| parent | 1b6196dec95e12ae44b5cfe62073c3dcd3f52686 (diff) | |
soc/intel/skylake: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions
generic ACPI definitions.
BUG=chrome-os-partner:54977
Change-Id: I5f2aa424a167092b570fda020cddce5ef906860a
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15671
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pm.h | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index a89b764454..d1aa0b4bc8 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -17,6 +17,7 @@ #ifndef _SOC_PM_H_ #define _SOC_PM_H_ +#include <arch/acpi.h> #include <arch/io.h> #include <soc/pmc.h> @@ -38,14 +39,6 @@ #define GBL_EN (1 << 5) #define TMROF_EN (1 << 0) #define PM1_CNT 0x04 -#define SLP_EN (1 << 13) -#define SLP_TYP (7 << 10) -#define SLP_TYP_SHIFT 10 -#define SLP_TYP_S0 0 -#define SLP_TYP_S1 1 -#define SLP_TYP_S3 5 -#define SLP_TYP_S4 6 -#define SLP_TYP_S5 7 #define GBL_RLS (1 << 2) #define BM_RLD (1 << 1) #define SCI_EN (1 << 0) @@ -141,10 +134,6 @@ #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 -#define SLEEP_STATE_S0 0 -#define SLEEP_STATE_S3 3 -#define SLEEP_STATE_S5 5 - struct chipset_power_state { uint16_t pm1_sts; uint16_t pm1_en; |