diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-05-24 12:21:06 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-20 15:51:48 +0000 |
| commit | afa07f7ae48d9e9d79aef712933777a56551f5be (patch) | |
| tree | f7f0342eb23f33d3c2834617e0f8e69a58b4ff52 /src/soc/intel/skylake/include | |
| parent | 55a8d8a772322e5ceb71c28785b1815970c468c5 (diff) | |
soc/intel/common/block: Move common uart function to block/uart
This patch moves uart functions which are common across multiple soc to
block/uart. This will remove redundant code copy from soc
{skylake/apollolake/cannonlake}.
BUG=b:78109109
BRANCH=none
TEST=Build and boot on KBL/APL/CNL platform.
Change-Id: I109d0e5c942e499cb763bde47cb7d53dfbf5cef6
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/bootblock.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/iomap.h | 5 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/include/soc/bootblock.h b/src/soc/intel/skylake/include/soc/bootblock.h index 59ce92a58d..f5065148d3 100644 --- a/src/soc/intel/skylake/include/soc/bootblock.h +++ b/src/soc/intel/skylake/include/soc/bootblock.h @@ -27,7 +27,6 @@ static inline void bootblock_fsp_temp_ram_init(void) {} /* Bootblock pre console init programming */ void bootblock_cpu_init(void); void bootblock_pch_early_init(void); -void pch_uart_init(void); /* Bootblock post console init programming */ void i2c_early_init(void); diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h index 475d79db71..628a272a54 100644 --- a/src/soc/intel/skylake/include/soc/iomap.h +++ b/src/soc/intel/skylake/include/soc/iomap.h @@ -25,11 +25,12 @@ #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_SIZE 0x02000000 -#define UART_DEBUG_BASE_0_SIZE 0x1000 +#define UART_BASE_SIZE 0x1000 #define UART_BASE_0_ADDRESS 0xfe030000 /* Both UART BAR 0 and 1 are 4KB in size */ #define UART_BASE_0_ADDR(x) (UART_BASE_0_ADDRESS + (2 * \ - UART_DEBUG_BASE_0_SIZE * (x))) + UART_BASE_SIZE * (x))) +#define UART_BASE(x) UART_BASE_0_ADDR(x) #define EARLY_I2C_BASE_ADDRESS 0xfe040000 #define EARLY_I2C_BASE(x) (EARLY_I2C_BASE_ADDRESS + (0x1000 * (x))) |