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authorDuncan Laurie <dlaurie@chromium.org>2016-10-25 19:58:27 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-10-27 16:30:54 +0200
commit8d01902bb78e25c750f796ea2645d17672f4b9a3 (patch)
tree891dd1f1624c91add97e26b32896e648794e2e24 /src/soc/intel/skylake/include
parentf0ba2259b84c1f5083dab14925351ddf8b245e11 (diff)
skylake: Add support for eSPI SMI events
Add the necessary infrastructure to support eSPI SMI events, and a mainboard handler to pass control to the EC. BUG=chrome-os-partner:58666 TEST=tested on eve board with eSPI enabled, verified that lid close event from the EC during firmware will result in an SMI and shut down the system. Change-Id: I6367e233e070a8fca053a7bdd2534c0578d15d12 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/17134 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/include/soc/smm.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index ede3efb982..0045fa04e8 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -46,6 +46,7 @@
#define SMI_EN 0x30
#define XHCI_SMI_EN (1 << 31)
#define ME_SMI_EN (1 << 30)
+#define ESPI_SMI_EN (1 << 28)
#define GPIO_UNLOCK_SMI_EN (1 << 27)
#define INTEL_USB2_EN (1 << 18)
#define LEGACY_USB2_EN (1 << 17)
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index 1beaaa4986..71083b3cbf 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -50,6 +50,8 @@ struct smm_relocation_params {
/* Mainboard handler for GPI SMIs*/
void mainboard_smi_gpi_handler(const struct gpi_status *sts);
+/* Mainboard handler for eSPI SMIs */
+void mainboard_smi_espi_handler(void);
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
void smm_relocation_handler(int cpu, uintptr_t curr_smbase,