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authorDuncan Laurie <dlaurie@chromium.org>2015-11-21 18:40:19 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:22:23 +0100
commit8996084f82119564362b1f9cb28fcbb7d74b3188 (patch)
tree0402f7c67e4b2afc321af841d7925ffcda7d65b5 /src/soc/intel/skylake/include
parent21cc96cacd2a2a760524a35298f25dbc59c30072 (diff)
intel/skylake: Add ACPI device for audio controller
Add the audio controller device to ACPI and define the _DSM handler to return the address of the NHLT table, if it has been set in NVS. BUG=chrome-os-partner:47346 BRANCH=none TEST=build and boot on glados and chell Change-Id: I8dc186a8bb79407b69ef32fb224a7c0f85c05bc4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 6b73fba375f83f175d0b73e5e70a058a6c259e0d Original-Change-Id: Ia9bedbae198e53fe415adc086a44b8b29b7f611d Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/313824 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12597 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/include')
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index 13be9214cc..032068f484 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -51,8 +51,9 @@ typedef struct {
u64 pm1i; /* 0x20 - 0x27 - PM1 wake status bit */
u64 gpei; /* 0x28 - 0x2f - GPE wake status bit */
u8 dpte; /* 0x30 - Enable DPTF */
-
- u8 unused[207];
+ u64 nhla; /* 0x31 - NHLT Address */
+ u32 nhll; /* 0x39 - NHLT Length */
+ u8 unused[195];
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;