diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-12-19 10:27:45 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-21 03:48:13 +0000 |
| commit | 7f4ec968695e918da49fc9b9163188188b71f05b (patch) | |
| tree | 7a6ad392a585451eec8086562cea9fa44e06a5e6 /src/soc/intel/skylake/include | |
| parent | 9b98febe7a9126ab4a323c8eeedb1427e959f7d9 (diff) | |
soc/intel/skylake: Implement pmc_soc_restore_power_failure as per EDS
TEST=KBL_RVP is able to power on after reconnecting power supply.
Change-Id: Ic707164a576ffb25418eb6553843cd8edc608800
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/include')
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pm.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index 00578180eb..e904658397 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -135,14 +135,10 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) -#define MAINBOARD_POWER_OFF 0 -#define MAINBOARD_POWER_ON 1 -#define MAINBOARD_POWER_KEEP 2 - /* This is defined as ETR3 in EDS. We named it as ETR here for consistency */ #define ETR 0xac -# define CF9_LOCK (1 << 31) -# define CF9_GLB_RST (1 << 20) +#define CF9_LOCK (1 << 31) +#define CF9_GLB_RST (1 << 20) #define PRSTS 0x10 |