diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-07-01 12:25:46 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-30 07:21:03 +0000 |
| commit | 76d17719fe44faa4aa97fd6c26f121ba279761dd (patch) | |
| tree | 2f3ac06dd8a153872d5656883be6397858daf66f /src/soc/intel/skylake/graphics.c | |
| parent | 132bbe6be537b5cb8e827e01f28086d3e3ce6677 (diff) | |
soc/intel/skylake: Save/restore GMA OpRegion address
Add global/ACPI nvs variables required for IGD OpRegion.
Add functions necessary to save the ACPI OpRegion table
address in ASLB, and restore table address upon S3 resume.
Implementation modeled on existing Baytrail code.
Test: boot Windows 10 on google/chell with Tianocore payload and
GOP display init, observe display driver loaded and functional,
display not black screen when resuming from S3 suspend.
Change-Id: Icd6b514e531eec6e49dbb03eb765144f41c1e31b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/25198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/skylake/graphics.c')
| -rw-r--r-- | src/soc/intel/skylake/graphics.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 95a37d673d..bda08c54c0 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -14,11 +14,13 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <console/console.h> #include <device/pci.h> #include <drivers/intel/gma/i915_reg.h> #include <intelblocks/graphics.h> #include <drivers/intel/gma/opregion.h> +#include <soc/nvs.h> #include <soc/ramstage.h> uintptr_t fsp_soc_get_igd_bar(void) @@ -60,6 +62,21 @@ void graphics_soc_init(struct device *dev) /* Initialize PCI device, load/execute BIOS Option ROM */ pci_dev_init(dev); + + intel_gma_restore_opregion(); +} + +uintptr_t gma_get_gnvs_aslb(const void *gnvs) +{ + const global_nvs_t *gnvs_ptr = gnvs; + return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0); +} + +void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb) +{ + global_nvs_t *gnvs_ptr = gnvs; + if (gnvs_ptr) + gnvs_ptr->aslb = aslb; } /* Initialize IGD OpRegion, called from ACPI code */ @@ -72,6 +89,7 @@ uintptr_t graphics_soc_write_acpi_opregion(struct device *device, uintptr_t current, struct acpi_rsdp *rsdp) { igd_opregion_t *opregion; + global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); /* If GOP is not used, exit here */ if (!IS_ENABLED(CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE)) @@ -86,7 +104,8 @@ uintptr_t graphics_soc_write_acpi_opregion(struct device *device, if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS) return current; - + if (gnvs) + gnvs->aslb = (u32)(uintptr_t)opregion; update_igd_opregion(opregion); current += sizeof(igd_opregion_t); current = acpi_align_current(current); |