diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-07-27 08:04:54 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-07-27 23:53:03 +0200 |
| commit | c31973760f7dd3db2b149cb512b0a9dbb9ef45cc (patch) | |
| tree | 5078cfaeefccf6339999ed536cb6451204ced8ee /src/soc/intel/skylake/finalize.c | |
| parent | bc24b85e6a1ce040e3d9f505e188c686496b7e29 (diff) | |
soc/intel/common: Store MRC data in next available slot in the cache
Currently, coreboot performs an erase of the entire MRC cache region on
flash if there is a version mismatch for the MRC data. Instead of doing
that, store the new MRC data in the next available slot, if there is
enough space available in the cache region.
BUG=chrome-os-partner:55699
Change-Id: Ib24a94f0a47c79941ed9f60095360ae3aad5540b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15915
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/finalize.c')
0 files changed, 0 insertions, 0 deletions