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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-08-05 21:36:11 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-04-22 19:41:29 +0000 |
| commit | 6e64c1a4e09de71d359c3123f7be1dfceba1f0a1 (patch) | |
| tree | 0e53221b6d5a9da8dee9224a6b8b6b27d546a62b /src/soc/intel/skylake/finalize.c | |
| parent | 70299d916891b718606cad151cf56b1d410cf96a (diff) | |
soc/intel/common,skl: set MSR LT_LOCK_MEMORY once, not per thread
The MSR LT_LOCK_MEMORY is package-scoped, not thread-scoped. Only set it
once.
Tested on Acer ES1-572 by checking chipsec results.
Change-Id: If3d61fcbc9ab99b6c1b7b74881e6d9c6be04a498
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44242
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/finalize.c')
| -rw-r--r-- | src/soc/intel/skylake/finalize.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index f8b36a48bd..ebbd3da238 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -84,8 +84,7 @@ static void soc_lockdown(struct device *dev) pci_write_config8(dev, GEN_PMCON_A, reg8); } - /* Lock chipset memory registers to protect SMM */ - mp_run_on_all_cpus(cpu_lt_lock_memory, NULL); + cpu_lt_lock_memory(); } static void soc_finalize(void *unused) |