diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2021-07-13 07:23:22 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-18 12:32:43 +0000 |
| commit | 66c8062a0072e9b162bf132fc5f279db158ab708 (patch) | |
| tree | 31461bf5d1e53442f192118d6ace3fac6034f1e1 /src/soc/intel/skylake/chip.c | |
| parent | bc89bc6680c186c3a7969e93f48b90bc6d6e9eb6 (diff) | |
soc/skylake: Make VT-d controllable from CMOS option
Make VT-d enable or disable based on CMOS value "vtd"
1 = Enable
0 = Disable
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1aea14968e08ee6af822bd259ca1d462f8926994
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index dd42f31961..a04869990d 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -509,7 +509,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchIoApicBdfValid = 0; /* Enable VT-d and X2APIC */ - if (soc_is_vtd_capable()) { + if (soc_vtd_enabled()) { params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS; params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS; params->X2ApicOptOut = 0; |