diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-09 14:33:15 +0200 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-16 06:53:46 +0000 |
commit | 08769c6d1404c1be0333273d8b988544750ce87d (patch) | |
tree | ef37aeb920efea81b84ecf50c2ab990c09541b30 /src/soc/intel/skylake/acpi | |
parent | 159520ed7881d1be2fdd02ee13040e8e21a9833c (diff) |
soc/intel/*: Use SSDT to pass A4GB and A4GS
GNVS is more fragile as you need to keep struct elements in sync with
ASL code.
Change-Id: I2cd5e6b56e4a0dbbb11f4a0ac97e8f84d53b90ec
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/skylake/acpi')
-rw-r--r-- | src/soc/intel/skylake/acpi/systemagent.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index 1ca6232712..f9b8f2d7c3 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -48,6 +48,9 @@ Device (MCHC) } } +External (A4GS, IntObj) +External (A4GB, IntObj) + Method (_CRS, 0, Serialized) { Name (MCRS, ResourceTemplate () |