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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-04-28 14:36:38 +0530 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-05-28 14:20:30 +0000 |
| commit | b4de2612289a2a58863671318f5aac619c05f5d2 (patch) | |
| tree | 022e3ce4d0b5534a68c8a4e06829ef740e56f484 /src/soc/intel/skylake/acpi/scs.asl | |
| parent | ab5b7b3eadcf386a1c08d9dcd1e9b85b0cb7a7d1 (diff) | |
soc/intel/common: Use coreboot error codes
The patch uses coreboot error codes instead of uint8_t data type in the
pre_mem_debug_init function.
TEST=build code for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I957ff764900cb789bf2aacf0472dcb281f48af07
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/acpi/scs.asl')
0 files changed, 0 insertions, 0 deletions