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| author | Subrata Banik <subrata.banik@intel.com> | 2021-01-27 12:50:06 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-28 09:26:48 +0000 |
| commit | ac8c357ddcf2c58c4903c198224b13f045672ca4 (patch) | |
| tree | 370b0d132a080314128a37400c487ffad3246646 /src/soc/intel/skylake/acpi/pch.asl | |
| parent | 316466b76513dad87f1b7c90eab142ddea955fcc (diff) | |
mb/intel/adlrvp: Configure SATA DEVSLP as per latest schematics
1. GPP_E5 => Remove unused GPIOs
2. GPP_H12, GPP_H13 => Program the correct Native Functions for GPIO
Change-Id: I588a8c1153eaa1bf818a081c6c5d18a669017d95
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/skylake/acpi/pch.asl')
0 files changed, 0 insertions, 0 deletions