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authorLee Leahy <leroy.p.leahy@intel.com>2015-05-12 18:23:27 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2015-07-16 17:24:48 +0200
commit1d14b3e926c15027f9272f1e80b8913fef8cf25d (patch)
treeb3d89ad4bb1b0ea5ac05d1d7dc6cbf26ec93e6c3 /src/soc/intel/skylake/acpi/gpio.asl
parentb000513741d330947bb832a5835378e35bdfb394 (diff)
soc/intel: Add Skylake SOC support
Add the files to support the Skylake SOC. Matches chromium tree at 927026db BRANCH=none BUG=None TEST=Build and run on a Skylake platform Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10341 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/acpi/gpio.asl')
-rw-r--r--src/soc/intel/skylake/acpi/gpio.asl12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index c6d8753975..69ee721393 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -2,6 +2,7 @@
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,7 +15,7 @@
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Foundation, Inc.
*/
Device (GPIO)
@@ -22,13 +23,8 @@ Device (GPIO)
// GPIO Controller
Method (_HID)
{
- If (\ISWP ()) {
- // WildcatPoint
- Return ("INT3437")
- }
-
- // LynxPoint-LP
- Return ("INT33C7")
+ //Sunrisepoint-LP PCH
+ Return ("INT344B")
}
Name (_UID, 1)