diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2017-04-19 22:34:25 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-05-09 17:52:30 +0200 |
| commit | 502131a6ad3f3eae89ccd85402708ae90a6f2b4f (patch) | |
| tree | a5609dff3594e0a37c2007c08477072bbd48abc6 /src/soc/intel/skylake/Makefile.inc | |
| parent | 709bc6eadab43d8faf96e1634dc439f2967c03f0 (diff) | |
soc/intel/skylake: Use intel/common/block/smbus code
Change-Id: I2ca32ab594552424e4f1358302641f159a3d7e62
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/19373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 1d8fe168fb..d25332c93a 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -14,7 +14,6 @@ bootblock-y += bootblock/cpu.c bootblock-y += bootblock/i2c.c bootblock-y += bootblock/pch.c bootblock-y += bootblock/report_platform.c -bootblock-y += bootblock/smbus.c bootblock-$(CONFIG_UART_DEBUG) += bootblock/uart.c bootblock-$(CONFIG_UART_DEBUG) += uart_debug.c bootblock-y += gpio.c @@ -44,8 +43,6 @@ romstage-y += pch.c romstage-y += pei_data.c romstage-y += pmutil.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c -romstage-y += smbus_common.c -romstage-y += early_smbus.c romstage-y += spi.c romstage-y += tsc_freq.c romstage-$(CONFIG_UART_DEBUG) += uart_debug.c @@ -77,8 +74,6 @@ ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c ramstage-y += sata.c ramstage-y += sd.c ramstage-y += sgx.c -ramstage-y += smbus.c -ramstage-y += smbus_common.c ramstage-y += smi.c ramstage-y += smmrelocate.c ramstage-y += spi.c |