diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2017-09-21 19:22:22 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-22 15:32:03 +0000 |
| commit | 7387e04a35f8702918d3b1e6cff558ad3f4a3fa0 (patch) | |
| tree | 9e2cde09c1b77b7e9d9c50e8cc708d1e75b80f88 /src/soc/intel/skylake/Kconfig | |
| parent | ef059c5a092f898f9cecd3f2d94acc263b30b48e (diff) | |
soc/intel/skylake: Use EBDA area to store cbmem_top address
This patch uses BIOS EBDA area to store relevent details
like cbmem top during romstage after MRC init is done.
Also provide provision to use the same EBDA data across
various stages without reexecuting memory map algorithm.
BRANCH=none
BUG=b:63974384
TEST=Ensures HW based memmap algorithm is executing once in romstage
and store required data into EBDA for other stage to avoid redundant
calculation and get cbmem_top start from EBDA area.
Change-Id: Ib1a674efa5ab3a4fc076fc93236edd911d28b398
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/skylake/Kconfig')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index b045486491..53a8b5157c 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -54,6 +54,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_CPU select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT + select SOC_INTEL_COMMON_BLOCK_EBDA select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_ITSS |