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authorSooi, Li Cheng <li.cheng.sooi@intel.com>2017-01-04 17:22:51 +0800
committerAaron Durbin <adurbin@chromium.org>2017-01-19 07:28:15 +0100
commit951ec96f17100692daed8c5316ffa13a7ed387d9 (patch)
treeb5396bfa2b7bc35184ceae46499069aa9d06ba9d /src/soc/intel/sch/smbus.h
parent9b4c888f7bb91ea5034802ab381f87c4c9729ad9 (diff)
soc/intel/skylake: Add SATA interrupt for APIC mode
Add SATA interrupt for APIC mode Change-Id: I9e0682e235715399da2c585174925c89b9116ab3 Signed-off-by: Sooi, Li Cheng <li.cheng.sooi@intel.com> Reviewed-on: https://review.coreboot.org/18130 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/sch/smbus.h')
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