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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-10-27 13:35:54 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-22 04:17:03 +0100
commitebc21d125fb83ebde6af326df74789c51a48550a (patch)
treec76ac31f3ae1f4651a65c99d577b70ad27be5b57 /src/soc/intel/sch/early_init.c
parentbac0fad4082036638b30506a27fbe62c6e71b237 (diff)
intel/sch: Switch to MMCONF_SUPPORT_DEFAULT
Untested, only affected board is iwave/iwRainbowG6. Change-Id: Ie3c40ede85c9f89b54804dd2a411645be93911bf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17528 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/sch/early_init.c')
-rw-r--r--src/soc/intel/sch/early_init.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/sch/early_init.c b/src/soc/intel/sch/early_init.c
index ccc8022246..cd777769f2 100644
--- a/src/soc/intel/sch/early_init.c
+++ b/src/soc/intel/sch/early_init.c
@@ -196,9 +196,6 @@ static void sch_setup_non_standard_bars(void)
/* Base of Stolen Memory Address 0x1080 size 64B */
pci_write_config32(PCI_DEV(0, 0x02, 0), 0x5C, 0x3F800000);
- sch_port_access_write(0, 0, 4, DEFAULT_PCIEXBAR | 1); /* pre-b1 */
- sch_port_access_write(2, 9, 4, DEFAULT_PCIEXBAR | 1); /* b1+ */
-
/* RCBA */
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xF0,
((uintptr_t)DEFAULT_RCBABASE | 1));