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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-04-29 15:16:54 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-31 21:50:31 +0200 |
| commit | 5ef051a53a03d537b6feab4e85edb69835eb6998 (patch) | |
| tree | eb2c8089bf5fc987f6bafe4587be4db0aef66005 /src/soc/intel/quark/romstage/Makefile.inc | |
| parent | a87fcabd2efe49c8035b76146401e190a0ea6593 (diff) | |
soc/intel/quark: Add PCIe reset support
Migrate PCIe reset from PlatformPciHelperLib in QuarkFspPkg into
coreboot.
Change-Id: I1c33fa16b0323091e8f9bd503bbfdb8a253a76d4
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14944
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/romstage/Makefile.inc')
| -rw-r--r-- | src/soc/intel/quark/romstage/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/quark/romstage/Makefile.inc b/src/soc/intel/quark/romstage/Makefile.inc index fc7bd6aeb4..2f29b06a70 100644 --- a/src/soc/intel/quark/romstage/Makefile.inc +++ b/src/soc/intel/quark/romstage/Makefile.inc @@ -17,6 +17,7 @@ cpu_incs-y += $(src)/soc/intel/quark/romstage/esram_init.inc cpu_incs-y += $(src)/soc/intel/quark/romstage/cache_as_ram.inc romstage-y += mtrr.c +romstage-y += pcie.c romstage-y += report_platform.c romstage-y += romstage.c romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c |