diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-31 13:44:40 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-04 13:23:27 +0000 |
commit | def74aacedd4f33829347037f12cfc213b46bc6c (patch) | |
tree | 0046cc996ac4466c5109b5a6132e570deabdbae6 /src/soc/intel/quark/include | |
parent | 059902882ce56502124375c9395ebe8b49640710 (diff) |
soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>
Also sort includes.
Change-Id: I7da9c672ee230dfaebd943247639b78d675957e4
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69032
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/quark/include')
-rw-r--r-- | src/soc/intel/quark/include/soc/ramstage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h index d54a74aa50..3002322ffb 100644 --- a/src/soc/intel/quark/include/soc/ramstage.h +++ b/src/soc/intel/quark/include/soc/ramstage.h @@ -3,7 +3,7 @@ #ifndef _SOC_RAMSTAGE_H_ #define _SOC_RAMSTAGE_H_ -#include <arch/cpu.h> +#include <cpu/cpu.h> #include <device/device.h> #include <soc/QuarkNcSocId.h> |