diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-11-19 17:05:50 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-22 02:49:25 +0000 |
| commit | acbde3351392baeb8c2c258460bb6b57aecd55ea (patch) | |
| tree | 460bde3764e0040335954ac114c1b6c6eaef9206 /src/soc/intel/pantherlake/fsp_params.c | |
| parent | e7264110a6b32f9949a8e4a533548b903e041352 (diff) | |
soc/intel/pantherlake: Add option to enable UFS controller
This patch adds a Kconfig option to enable the UFS controller for
mainboards using the Intel Panther Lake-UH SoC.
By default, the UFS controller is disabled as it is not supported by
other SoC configurations. This prevents accidental enabling of the
UFS controller on unsupported platforms.
BUG=b:379828045
TEST=Built google/fatcat with and without UFS enabled.
Change-Id: Ica89ae85582367809128fc6cf0cd5fe5d40a2235
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85191
Reviewed-by: Pranava Y N <pranavayn@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/pantherlake/fsp_params.c')
| -rw-r--r-- | src/soc/intel/pantherlake/fsp_params.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/pantherlake/fsp_params.c b/src/soc/intel/pantherlake/fsp_params.c index eaef582f46..e0b0adf392 100644 --- a/src/soc/intel/pantherlake/fsp_params.c +++ b/src/soc/intel/pantherlake/fsp_params.c @@ -658,6 +658,20 @@ static void fill_fsps_iax_params(FSP_S_CONFIG *s_cfg, s_cfg->IaxEnable = is_devfn_enabled(PCI_DEVFN_IAA); } +static void fill_fsps_ufs_params(FSP_S_CONFIG *s_cfg, + const struct soc_intel_pantherlake_config *config) +{ +#if CONFIG(SOC_INTEL_PANTHERLAKE_U_H) + /* Setting FSP UPD (1,0) to enable controller 0 */ + s_cfg->UfsEnable[0] = is_devfn_enabled(PCI_DEVFN_UFS); + s_cfg->UfsEnable[1] = 0; +#else + /* Setting FSP UPD (0,0) to keep both controllers disabled */ + s_cfg->UfsEnable[0] = 0; + s_cfg->UfsEnable[1] = 0; +#endif +} + static void arch_silicon_init_params(FSPS_ARCH2_UPD *s_arch_cfg) { /* Assign FspEventHandler arch Upd to use coreboot debug event handler */ @@ -696,6 +710,7 @@ static void soc_silicon_init_params(FSP_S_CONFIG *s_cfg, fill_fsps_npu_params, fill_fsps_audio_params, fill_fsps_iax_params, + fill_fsps_ufs_params, }; for (size_t i = 0; i < ARRAY_SIZE(fill_fsps_params); i++) |