diff options
| author | Patrick Georgi <patrick@coreboot.org> | 2023-11-06 17:22:34 +0000 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-11-07 17:35:39 +0000 |
| commit | acbc4912375085a099c2427def464d6e481f2a90 (patch) | |
| tree | 15f07f8fceb2642c5a8b80cb591e2d3cfe26190f /src/soc/intel/meteorlake | |
| parent | ab5a9f937818cbfd1fc686a77c2de818e15d1cfc (diff) | |
Revert "Kconfig: Bring HEAP_SIZE to a common, large value"
This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
Reason for revert: It breaks wakeup from suspend on a bunch of boards.
While this approach of eyeballing "correct" values by chipset _should_
be fixed, it should also be accompanied by compile time verification
that the memory map works out.
Since nobody seems to care enough, let's just revert this, instead of
keeping the tree broken for a bunch of configurations.
Change-Id: I3cd73b6ce8b15f06d3480a03ab472dcd444d7ccc
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78850
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/meteorlake')
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index a2f2706145..923a2b4283 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -198,6 +198,11 @@ config IED_REGION_SIZE hex default 0x400000 +config HEAP_SIZE + hex + default 0x80000 if BMP_LOGO + default 0x10000 + # Intel recommends reserving the PCIe TBT root port resources as below: # - 42 buses # - 194 MiB Non-prefetchable memory |