diff options
author | Jianjun Wang <jianjun.wang@mediatek.com> | 2024-04-17 10:38:53 +0800 |
---|---|---|
committer | Yu-Ping Wu <yupingso@google.com> | 2024-10-28 03:35:46 +0000 |
commit | 97be4e7209bfdaa6c49a21c63f4cb0a18f77bce2 (patch) | |
tree | 700c79c22e20ac0cc098548a4e18b4e338a7d481 /src/soc/intel/meteorlake/soc_info.c | |
parent | 186916ca1e02d77b623a75a21ccb5831c59cf4ba (diff) |
soc/mediatek/mt8196: Add PCIe driver and early init support
Add PCIe driver for MT8196 platform.
According to the PCIe CEM specification, the deassertion of PERST#
should occur at least 100ms after the assertion. To ensure the 100ms
delay requirement is met and to save delay time in the ramstage, add
an early init data region to store the elapsed time since assertion.
This will speed up the boot time by 100ms.
PCIe port 1 and port 2 share the same PCIe resources, but PCIe port 2 is
not used. Therefore, in mtk_pcie_pre_init(), make sure PCIe port 2 is
reset to prevent interference with PCIe port 1.
TEST=Build pass, show pcie init pass log:
mtk_pcie_domain_enable: PCIe link up success (1)
BUG=b:317009620
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I826a96822e88972bcd4966b6681797a646adf3d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84696
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Diffstat (limited to 'src/soc/intel/meteorlake/soc_info.c')
0 files changed, 0 insertions, 0 deletions