diff options
author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2024-03-08 10:39:57 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-13 14:00:22 +0000 |
commit | 785a7aab1424089f85d91fb88af0ca62bc489b83 (patch) | |
tree | 444c80a1388edca1e80e7ee0c72ba893ac0479d2 /src/soc/intel/meteorlake/soc_info.c | |
parent | 7ee7b137a7638f5e9d85bd88e52e6391da0ebcbb (diff) |
soc/intel/mtl: Improve functions in soc_info.c
Remove debug message since it's static information.
Remove additional uint_8 varience and return below settings
directly:
1. CONFIG_SOC_INTEL_USB2_DEV_MAX
2. CONFIG_SOC_INTEL_USB3_DEV_MAX
3. MAX_TYPE_C_PORTS
4. CONFIG_MAX_TBT_ROOT_PORTS
5. CONFIG_MAX_ROOT_PORTS
6. CONFIG_MAX_PCIE_CLOCK_SRC
7. CONFIG_SOC_INTEL_UART_DEV_MAX
8. CONFIG_SOC_INTEL_I2C_DEV_MAX
9. CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX
BUG=none
TEST=Build and test on rex/karis, system can boot to OS
Change-Id: I26e882d2d9dcbef84718924aaab3864d89c58f39
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Diffstat (limited to 'src/soc/intel/meteorlake/soc_info.c')
-rw-r--r-- | src/soc/intel/meteorlake/soc_info.c | 36 |
1 files changed, 9 insertions, 27 deletions
diff --git a/src/soc/intel/meteorlake/soc_info.c b/src/soc/intel/meteorlake/soc_info.c index b5333bd01a..0772c7799b 100644 --- a/src/soc/intel/meteorlake/soc_info.c +++ b/src/soc/intel/meteorlake/soc_info.c @@ -9,63 +9,45 @@ uint8_t get_max_usb20_port(void) { - uint8_t usb20_port = CONFIG_SOC_INTEL_USB2_DEV_MAX; - printk(BIOS_DEBUG, "soc_info: max_usb20_port:%d\n", usb20_port); - return usb20_port; + return CONFIG_SOC_INTEL_USB2_DEV_MAX; } uint8_t get_max_usb30_port(void) { - uint8_t usb30_port = CONFIG_SOC_INTEL_USB3_DEV_MAX; - printk(BIOS_DEBUG, "soc_info: max_usb30_port:%d\n", usb30_port); - return usb30_port; + return CONFIG_SOC_INTEL_USB3_DEV_MAX; } uint8_t get_max_tcss_port(void) { - uint8_t tcss_port = MAX_TYPE_C_PORTS; - printk(BIOS_DEBUG, "soc_info: tcss_port:%d\n", tcss_port); - return tcss_port; + return MAX_TYPE_C_PORTS; } uint8_t get_max_tbt_pcie_port(void) { - uint8_t tbt_pcie_port = CONFIG_MAX_TBT_ROOT_PORTS; - printk(BIOS_DEBUG, "soc_info: max_tbt_pcie_port:%d\n", tbt_pcie_port); - return tbt_pcie_port; + return CONFIG_MAX_TBT_ROOT_PORTS; } uint8_t get_max_pcie_port(void) { - uint8_t pcie_port = CONFIG_MAX_ROOT_PORTS; - printk(BIOS_DEBUG, "soc_info: max_pcie_port:%d\n", pcie_port); - return pcie_port; + return CONFIG_MAX_ROOT_PORTS; } uint8_t get_max_pcie_clock(void) { - uint8_t pcie_clock = CONFIG_MAX_PCIE_CLOCK_SRC; - printk(BIOS_DEBUG, "soc_info: max_pcie_clock:%d\n", pcie_clock); - return pcie_clock; + return CONFIG_MAX_PCIE_CLOCK_SRC; } uint8_t get_max_uart_port(void) { - uint8_t uart_port = CONFIG_SOC_INTEL_UART_DEV_MAX; - printk(BIOS_DEBUG, "soc_info: max_uart_port:%d\n", uart_port); - return uart_port; + return CONFIG_SOC_INTEL_UART_DEV_MAX; } uint8_t get_max_i2c_port(void) { - uint8_t i2c_port = CONFIG_SOC_INTEL_I2C_DEV_MAX; - printk(BIOS_DEBUG, "soc_info: max_i2c_port:%d\n", i2c_port); - return i2c_port; + return CONFIG_SOC_INTEL_I2C_DEV_MAX; } uint8_t get_max_gspi_port(void) { - uint8_t gspi_port = CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX; - printk(BIOS_DEBUG, "soc_info: max_gspi_port:%d\n", gspi_port); - return gspi_port; + return CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX; } |