diff options
| author | Dinesh Gehlot <digehlot@google.com> | 2023-08-18 10:04:53 +0530 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-08-20 18:27:17 +0000 |
| commit | 095043fccac525bff3ba7f8eda713a766828899f (patch) | |
| tree | 3aae01f543025718ac1ef700d93edc0a1cc1eb98 /src/soc/intel/meteorlake/pmc.c | |
| parent | 2c40670fad5c20558bce0e52fce08f35a4db546b (diff) | |
soc/intel/mtl: Enable IOE_PMC support
IOE_PMC support was not enabled on Meteor Lake platforms. This patch
adds the bare minimum hooks to initialize and allocate a memory region
for IOE operations. Additionally, this patch moves those IOE operations
to a newly included IOE-specific file, Previously, PMC was responsible
for these operations.
BUG=b:287419766
TEST=build and verified on google/rex.
Change-Id: I8bbc0b8a3e32dad5404c80bc7717ef07e3ec60b9
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77261
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake/pmc.c')
| -rw-r--r-- | src/soc/intel/meteorlake/pmc.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/meteorlake/pmc.c b/src/soc/intel/meteorlake/pmc.c index 454ba9c15c..5c4fa2c115 100644 --- a/src/soc/intel/meteorlake/pmc.c +++ b/src/soc/intel/meteorlake/pmc.c @@ -156,10 +156,8 @@ static void soc_pmc_init(struct device *dev) * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. * Disabling ACPI PM timer also switches off TCO */ - if (!CONFIG(USE_PM_ACPI_TIMER)) { + if (!CONFIG(USE_PM_ACPI_TIMER)) setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); - setbits8(ioe_pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); - } } static void pm1_enable_pwrbtn_smi(void *unused) |