diff options
| author | Appukuttan V K <appukuttan.vk@intel.com> | 2024-05-03 10:32:34 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-05-30 13:21:46 +0000 |
| commit | 3725fce22bc386797641a75bcbda7093dda8d910 (patch) | |
| tree | cbe9cbfad4b3a71b9a51e76915f9146e20760909 /src/soc/intel/meteorlake/meminit.c | |
| parent | 8c3cf9eacee7c55c800f423059186709d923854e (diff) | |
soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
This commit updates the type definitions for FSP parameters in the
Meteor Lake platform to ensure compatibility with the FSP2.4
specification, that supports 64-bit builds for the first time and
this also ensures that parameter types works for both 32-bit
and 64-bit builds.
- In fsp_params.c, FSPS_ARCH_UPD macro is changed to
FSPS_ARCHx_UPD which supports FSP2.4 and older specifications.
Special handling is added for FspEventHandler assignment to handle
as the variable type is different in both cases.
- In meminit.c, the type for SPD pointers is changed from uint32_t
to efi_uintn_t to support both 32-bit and 64-bit builds.
BUG=b:329034258
TEST=Verified x86_32 and x86_64 builds on Meteor Lake board (Rex)
Change-Id: Ide220f60184135a6488f4472f69a471e2b383e2a
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82177
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake/meminit.c')
| -rw-r--r-- | src/soc/intel/meteorlake/meminit.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/meteorlake/meminit.c b/src/soc/intel/meteorlake/meminit.c index fa7e1fd09a..32ab358b46 100644 --- a/src/soc/intel/meteorlake/meminit.c +++ b/src/soc/intel/meteorlake/meminit.c @@ -77,7 +77,7 @@ static const struct soc_mem_cfg soc_mem_cfg[] = { static void mem_init_spd_upds(FSP_M_CONFIG *mem_cfg, const struct mem_channel_data *data) { - uint32_t *spd_upds[MRC_CHANNELS][CONFIG_DIMMS_PER_CHANNEL] = { + efi_uintn_t *spd_upds[MRC_CHANNELS][CONFIG_DIMMS_PER_CHANNEL] = { [0] = { &mem_cfg->MemorySpdPtr000, &mem_cfg->MemorySpdPtr001, }, [1] = { &mem_cfg->MemorySpdPtr010, &mem_cfg->MemorySpdPtr011, }, [2] = { &mem_cfg->MemorySpdPtr020, &mem_cfg->MemorySpdPtr021, }, @@ -106,7 +106,7 @@ static void mem_init_spd_upds(FSP_M_CONFIG *mem_cfg, const struct mem_channel_da bool enable_channel = 0; for (dimm = 0; dimm < CONFIG_DIMMS_PER_CHANNEL; dimm++) { - uint32_t *spd_ptr = spd_upds[ch][dimm]; + efi_uintn_t *spd_ptr = spd_upds[ch][dimm]; *spd_ptr = data->spd[ch][dimm]; if (*spd_ptr) |