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authorElyes Haouas <ehaouas@noos.fr>2022-11-18 15:07:33 +0100
committerMartin L Roth <gaumless@gmail.com>2022-11-26 23:39:16 +0000
commit9018dee6856791ab599463a771826936c20a80bb (patch)
tree079e966e6b894bb9c81ca25e9e783c28947e0e64 /src/soc/intel/meteorlake/bootblock
parent5aa98964fb4e2e8c10b1663f8d6a3faa2b700410 (diff)
src/soc/intel: Remove unnecessary space after casts
Change-Id: I098104f32dd7c66d7bb79588ef315a242c3889ba Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/meteorlake/bootblock')
-rw-r--r--src/soc/intel/meteorlake/bootblock/soc_die.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/bootblock/soc_die.c b/src/soc/intel/meteorlake/bootblock/soc_die.c
index 58de3619ed..f5a3c9188b 100644
--- a/src/soc/intel/meteorlake/bootblock/soc_die.c
+++ b/src/soc/intel/meteorlake/bootblock/soc_die.c
@@ -50,7 +50,7 @@ static void soc_die_config_pwrmbase(void)
pci_or_config16(PCI_DEV_PMC, PCI_COMMAND, (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER));
/* Enable PWRM in PMC */
- setbits32((void *) PCH_PWRM_BASE_ADDRESS + ACTL, PWRM_EN);
+ setbits32((void *)PCH_PWRM_BASE_ADDRESS + ACTL, PWRM_EN);
}
static void soc_die_early_iorange_init(void)