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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-01 08:44:14 -0600 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 21:57:35 +0000 |
commit | 77b36abcf6436734f74a40218b83fd82181ffb78 (patch) | |
tree | 6e6f0fc7ec4da9f30734a21c08fe911f24b7093f /src/soc/intel/jasperlake/pmc.c | |
parent | 6d44437ec1310ba7f896275d1b416eb35de467a9 (diff) |
soc/intel/jasperlake: Switch to runtime generation of Intel Power Engine
The pep.asl file is being obsoleted by runtime generation, therefore
switch jasperlake boards to this method.
soc/intel/jasperlake: Switch to acpigen PEPD
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ib7f17f9b3b1396708ba68fa7a6d199d6e8b0ba11
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/jasperlake/pmc.c')
-rw-r--r-- | src/soc/intel/jasperlake/pmc.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c index dce791c692..6223ed7eee 100644 --- a/src/soc/intel/jasperlake/pmc.c +++ b/src/soc/intel/jasperlake/pmc.c @@ -4,6 +4,7 @@ #include <console/console.h> #include <device/mmio.h> #include <device/device.h> +#include <intelblocks/acpi.h> #include <intelblocks/pmc.h> #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> @@ -101,9 +102,18 @@ static void pm1_enable_pwrbtn_smi(void *unused) BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, pm1_enable_pwrbtn_smi, NULL); +static void pmc_fill_ssdt(const struct device *dev) +{ + if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP)) + generate_acpi_power_engine(); +} + struct device_operations pmc_ops = { .read_resources = soc_pmc_read_resources, .set_resources = noop_set_resources, .init = soc_acpi_mode_init, .enable = pmc_init, +#if CONFIG(HAVE_ACPI_TABLES) + .acpi_fill_ssdt = pmc_fill_ssdt, +#endif }; |