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| author | Furquan Shaikh <furquan@google.com> | 2020-06-02 22:38:53 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-06 09:29:54 +0000 |
| commit | 20ecf2268b13a4d2a8b4a8490139ee064d9d8f62 (patch) | |
| tree | 4b4534d02db966263755d2902b63a215fffed9ba /src/soc/intel/jasperlake/meminit.c | |
| parent | 4a93ba9f778f8927f2ad7bec7c8009640708560d (diff) | |
lp4x: Add new memory parts and generate SPDs
This change adds the following memory parts to LP4x global list and
generates SPDs using gen_spd.go for TGL and JSL:
1. MT53E512M32D2NP-046 WT:E
2. K4U6E3S4AA-MGCR
3. H9HCNNNCPMMLXR-NEE
4. K4UBE3D4AA-MGCR
BUG=b:157862308, b:157732528
Change-Id: Ib7538247d39dfe5faab277d646f87f09103d6969
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41989
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/meminit.c')
0 files changed, 0 insertions, 0 deletions