aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/jasperlake/include
diff options
context:
space:
mode:
authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-10-22 00:36:16 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-10-26 06:55:18 +0000
commit468c46df25612e1928f632a78d26fcbb74ad4281 (patch)
treedfbea0ed99198d2833ba56ac49ca8fede3608fec /src/soc/intel/jasperlake/include
parentb11b731e80344a6460fb36010bb3785fd0ab59ca (diff)
Revert "soc/intel/jasperlake: Allow mainboard to override chip configuration"
This reverts commit 5acea15d63e821a1bc416d206162ed030cd5d57c. This change got accidentally merged. There is no need for mainboard to override chip configuration. BUG=None TEST=Build and boot Drawlat to OS. Change-Id: I166ba7e5ee50a6329032eae8e17b9a554b094e2e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46653 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/jasperlake/include')
-rw-r--r--src/soc/intel/jasperlake/include/soc/ramstage.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/jasperlake/include/soc/ramstage.h b/src/soc/intel/jasperlake/include/soc/ramstage.h
index 1de8e37758..8188fbdb84 100644
--- a/src/soc/intel/jasperlake/include/soc/ramstage.h
+++ b/src/soc/intel/jasperlake/include/soc/ramstage.h
@@ -9,7 +9,6 @@
#include <soc/soc_chip.h>
void mainboard_silicon_init_params(FSP_S_CONFIG *params);
-void mainboard_update_soc_chip_config(struct soc_intel_jasperlake_config *config);
void soc_init_pre_device(void *chip_info);
#endif