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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2020-11-05 13:04:38 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-11-09 07:41:59 +0000
commite3f030ecbbcef21ea8c6858e656bd9a7c07e5df8 (patch)
treec12972e6bd3940ec767fbb2d2f4fc98abad050a7 /src/soc/intel/jasperlake/gspi.c
parent2b13ca5bcdc15b894665c7f0a0d26c45c1e46efc (diff)
soc/intel/jasperlake: Update reserved GPIO names in gpio_soc_defs.h
Multiple GPIOs were defined as a reserved GPIO in JasperLake. Correcting this GPIOs with proper name to align with EDS volume 2 Also removing unused GPIOs at the end of community 4 (group E). Since those reserved GPIOs are at the end of the community, it won't affect the offset calculations within community. This change will also help us aligning pad numbering with kernel pin-ctrl drivers too. Reference: DOC#618876 (EDS volume 2) BUG=None BRANCH=None TEST=Platform boots fine and basic functionality such as SD, Wifi works. Change-Id: I8326b7181d47a177261656f51602638d8ce80fbb Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47232 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/gspi.c')
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