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| author | Rob Barnes <robbarnes@google.com> | 2023-06-14 11:19:53 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 17:46:08 +0000 |
| commit | d6b58d5c76a383f6a9f106b7af3b479d7a786ca3 (patch) | |
| tree | b26f88bdd893e1324766c103d1fdf11237c48c0e /src/soc/intel/jasperlake/gpio.c | |
| parent | 7758b47e3be128ab8c1c3fecb63b8f0054351ee0 (diff) | |
util/apcb: Add apcb edit tool for phoenix
Add a new apcb edit tool, apcb_v3a_edit.py, that injects SPDs into
an APCB for phoenix platform.
The tool makes several assumptions:
* Each SPD only uses blocks 0, 1, 3 and 5. All other blocks are zero.
* Each block is 64 bytes.
* Dimm and socket are always 0
* Unused SPD entries are zero'd
BUG=b:281983434
BRANCH=None
TEST=build, flash, boot myst
Change-Id: Ifb50287de77138170714a702ab87d56427aacfef
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76188
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/gpio.c')
0 files changed, 0 insertions, 0 deletions