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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-06-01 17:03:41 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-06-07 21:46:41 +0000
commitc47422d6c3970baee5da2a9085a70bf3f987fcd5 (patch)
treeb010660433df88e3d067bee3f2bbf6e09b6dc78b /src/soc/intel/jasperlake/chip.c
parent4164476dfc282c3a473d60f0f65b483086e24d50 (diff)
soc/intel/jasperlake: Add JSL PMC as 'hidden' PCI device
This change allows treating the PMC as a 'hidden' PCI device on Jasper Lake, so that the MMIO & I/O resources can be exposed as belonging to this device, instead of the system agent and LPC/eSPI. Change-Id: Ie07987c68388d03359c43f64a849dc6e3f94676e Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/jasperlake/chip.c')
-rw-r--r--src/soc/intel/jasperlake/chip.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 6f4ee005c7..ff63398804 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -150,6 +150,7 @@ static struct device_operations cpu_bus_ops = {
#endif
};
+extern struct device_operations pmc_ops;
static void soc_enable(struct device *dev)
{
/* Set the operations if it is a special bus type */
@@ -157,6 +158,9 @@ static void soc_enable(struct device *dev)
dev->ops = &pci_domain_ops;
else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
dev->ops = &cpu_bus_ops;
+ else if (dev->path.type == DEVICE_PATH_PCI &&
+ dev->path.pci.devfn == PCH_DEVFN_PMC)
+ dev->ops = &pmc_ops;
}
struct chip_operations soc_intel_jasperlake_ops = {