summaryrefslogtreecommitdiff
path: root/src/soc/intel/jasperlake/acpi
diff options
context:
space:
mode:
authorAamir Bohra <aamir.bohra@intel.com>2020-04-02 15:53:58 +0530
committerFurquan Shaikh <furquan@google.com>2020-04-10 19:31:48 +0000
commit30ab312322dba872917a96e82e269065c80556c7 (patch)
treeca9373ef7865dc9666d3d94486808351e627c479 /src/soc/intel/jasperlake/acpi
parente9eb4d5df93d9a1b4ced302160b76d252c78ca6a (diff)
soc/intel/jasperlake: Publish single GPIO ACPI device
Current pin-ctrl kernel v5.4 driver expects the firmware to publish single GPIO ACPI device. Until kernel pin-ctrl driver implementation is updated to consume community based GPIO ACPI device, update the current ACPI code to comply with pin-ctrl driver requirement. BUG=b:150154277 TEST=Verify intel pin-ctrl driver can successfully load in OS Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Change-Id: Ifcc92adaee550182ab405541ea85019f31bb8658 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39470 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/jasperlake/acpi')
-rw-r--r--src/soc/intel/jasperlake/acpi/gpio.asl100
1 files changed, 31 insertions, 69 deletions
diff --git a/src/soc/intel/jasperlake/acpi/gpio.asl b/src/soc/intel/jasperlake/acpi/gpio.asl
index 2b4aff09c0..f1e4498092 100644
--- a/src/soc/intel/jasperlake/acpi/gpio.asl
+++ b/src/soc/intel/jasperlake/acpi/gpio.asl
@@ -1,107 +1,69 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
+
+#include <intelblocks/gpio.h>
#include <soc/gpio_defs.h>
#include <soc/irq.h>
#include <soc/pcr_ids.h>
-#include <intelblocks/gpio.h>
#include "gpio_op.asl"
-Device (GCM0)
+Device (GPIO)
{
Name (_HID, CROS_GPIO_NAME)
Name (_UID, 0)
- Name (_DDN, "GPIO Controller Community 0")
+ Name (_DDN, "GPIO Controller")
Name (RBUF, ResourceTemplate()
{
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM0)
+ Memory32Fixed (ReadWrite, 0, 0, COM0)
+ Memory32Fixed (ReadWrite, 0, 0, COM1)
+ Memory32Fixed (ReadWrite, 0, 0, COM2)
+ Memory32Fixed (ReadWrite, 0, 0, COM4)
+ Memory32Fixed (ReadWrite, 0, 0, COM5)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
{ GPIO_IRQ14 }
})
+
Method (_CRS, 0, NotSerialized)
{
+ /* GPIO Community 0 */
CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
+ CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
BAS0 = ^^PCRB (PID_GPIOCOM0)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
-
-Device (GCM1)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 1)
- Name (_DDN, "GPIO Controller Community 1")
+ LEN0 = GPIO_BASE_SIZE
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM1)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 1 */
CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
+ CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
BAS1 = ^^PCRB (PID_GPIOCOM1)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
+ LEN1 = GPIO_BASE_SIZE
-Device (GCM4)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 4)
- Name (_DDN, "GPIO Controller Community 4")
+ /* GPIO Community 2 */
+ CreateDWordField (^RBUF, ^COM2._BAS, BAS2)
+ CreateDWordField (^RBUF, ^COM2._LEN, LEN2)
+ BAS2 = ^^PCRB (PID_GPIOCOM2)
+ LEN2 = GPIO_BASE_SIZE
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM4)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 4 */
CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
+ CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
BAS4 = ^^PCRB (PID_GPIOCOM4)
- Return (^RBUF)
- }
- Method (_STA)
- {
- Return (0xF)
- }
-}
+ LEN4 = GPIO_BASE_SIZE
-Device (GCM5)
-{
- Name (_HID, CROS_GPIO_NAME)
- Name (_UID, 5)
- Name (_DDN, "GPIO Controller Community 5")
-
- Name (RBUF, ResourceTemplate()
- {
- Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, COM5)
- Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
- { GPIO_IRQ14 }
- })
- Method (_CRS, 0, NotSerialized)
- {
+ /* GPIO Community 5 */
CreateDWordField (^RBUF, ^COM5._BAS, BAS5)
+ CreateDWordField (^RBUF, ^COM5._LEN, LEN5)
BAS5 = ^^PCRB (PID_GPIOCOM5)
- Return (^RBUF)
+ LEN5 = GPIO_BASE_SIZE
+
+ Return (RBUF)
}
- Method (_STA)
+
+ Method (_STA, 0, NotSerialized)
{
Return (0xF)
}
}
-
/*
* Get GPIO DW0 Address
* Arg0 - GPIO Number