diff options
author | Subrata Banik <subrata.banik@intel.com> | 2018-10-31 13:51:07 +0530 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2018-11-17 09:37:09 +0000 |
commit | 990db2213f5e69974e6334f001aa847d1def718a (patch) | |
tree | e585706549006c2c29de4f3054f6d3c0387e01da /src/soc/intel/icelake/acpi/pci_irqs.asl | |
parent | c2e494136731571a78b2bdd7ca9dc536a8b5aecd (diff) |
soc/intel/icelake: Make static IRQ mapping for ICP PCH pci devices
Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call
due to PCH requirement change from CNP PCH onwards, hence making static IRQ
mapping for pci_irqs.asl and pcie.asl
Also remove unused irqlinks.asl from soc/intel/icelake/acpi/
Change-Id: Idec00c3b8a97cb5aa7b4000840aba914aea478c9
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/icelake/acpi/pci_irqs.asl')
-rw-r--r-- | src/soc/intel/icelake/acpi/pci_irqs.asl | 68 |
1 files changed, 33 insertions, 35 deletions
diff --git a/src/soc/intel/icelake/acpi/pci_irqs.asl b/src/soc/intel/icelake/acpi/pci_irqs.asl index d346ce2269..79c99277f5 100644 --- a/src/soc/intel/icelake/acpi/pci_irqs.asl +++ b/src/soc/intel/icelake/acpi/pci_irqs.asl @@ -84,51 +84,49 @@ Name (PICP, Package () { Name (PICN, Package () { /* D31: cAVS, SMBus, GbE, Nothpeak */ - Package () { 0x001FFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001FFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001FFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001FFFFF, 3, \_SB.PCI0.LNKD, 0 }, - /* D32: Can't use PIC*/ + Package () { 0x001FFFFF, 0, 0, 11 }, + Package () { 0x001FFFFF, 1, 0, 10 }, + Package () { 0x001FFFFF, 2, 0, 11 }, + Package () { 0x001FFFFF, 3, 0, 11 }, + /* D30: Can't use PIC*/ /* D29: PCI Express Port 9-16 */ - Package () { 0x001DFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001DFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001DFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001DFFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x001DFFFF, 0, 0, 11 }, + Package () { 0x001DFFFF, 1, 0, 10 }, + Package () { 0x001DFFFF, 2, 0, 11 }, + Package () { 0x001DFFFF, 3, 0, 11 }, /* D28: PCI Express Port 1-8 */ - Package () { 0x001CFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001CFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001CFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001CFFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x001CFFFF, 0, 0, 11 }, + Package () { 0x001CFFFF, 1, 0, 10 }, + Package () { 0x001CFFFF, 2, 0, 11 }, + Package () { 0x001CFFFF, 3, 0, 11 }, + /* D26: Can't use PIC*/ /* D25: Can't use PIC*/ - /* D23 */ - Package () { 0x0017FFFF, 0, \_SB.PCI0.LNKA, 0 }, + /* D23: SATA controller */ + Package () { 0x0017FFFF, 0, 0, 11 }, /* D22: CSME (HECI, IDE-R, KT redirection */ - Package () { 0x0016FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0016FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0016FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0016FFFF, 3, \_SB.PCI0.LNKD, 0 }, - /* D21: Can't use PIC*/ + Package () { 0x0016FFFF, 0, 0, 11 }, + Package () { 0x0016FFFF, 1, 0, 10 }, + Package () { 0x0016FFFF, 2, 0, 11 }, + Package () { 0x0016FFFF, 3, 0, 11 }, /* D20: xHCI, OTG, SRAM, CNVi WiFi */ - Package () { 0x0014FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0014FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0014FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0014FFFF, 3, \_SB.PCI0.LNKD, 0 }, - /* D19: Can't use PIC*/ - /* Thermal */ - Package () { 0x0012FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0014FFFF, 0, 0, 11 }, + Package () { 0x0014FFFF, 1, 0, 10 }, + Package () { 0x0014FFFF, 2, 0, 11 }, + Package () { 0x0014FFFF, 3, 0, 11 }, + /* D18: Can't use PIC*/ /* P.E.G. Root Port D1F0 */ - Package () { 0x0001FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0001FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0001FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0001FFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x0001FFFF, 0, 0, 11 }, + Package () { 0x0001FFFF, 1, 0, 10 }, + Package () { 0x0001FFFF, 2, 0, 11 }, + Package () { 0x0001FFFF, 3, 0, 11 }, /* SA IGFX Device */ - Package () { 0x0002FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0002FFFF, 0, 0, 11 }, /* SA Thermal Device */ - Package () { 0x0004FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0004FFFF, 0, 0, 11 }, /* SA IPU Device */ - Package () { 0x0005FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0005FFFF, 0, 0, 11 }, /* SA GNA Device */ - Package () { 0x0008FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0008FFFF, 0, 0, 11 }, }) Method (_PRT) |