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authorSubrata Banik <subrata.banik@intel.com>2019-11-14 11:30:43 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-11-22 10:44:39 +0000
commit94146009a190383a581618fd969bf2276fb73585 (patch)
treecd47386daf14f2251dcd4eb43ee2f497517659b6 /src/soc/intel/icelake/Kconfig
parent53509cf15aeba1a7afa262ca4d3ddb77f019ba00 (diff)
soc/intel/icelake: Make CpuMpPpi implementation default for ICL
TEST=Could able to build and boot ICL DE system Change-Id: Icd71ec99f06434896c73cff5a52cd3a5ad6ce5f3 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36839 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/icelake/Kconfig')
-rw-r--r--src/soc/intel/icelake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index cb9de149d3..a2fe5ed3da 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -60,6 +60,7 @@ config CPU_SPECIFIC_OPTIONS
select UDK_2017_BINDING
select DISPLAY_FSP_VERSION_INFO
select HECI_DISABLE_USING_SMM
+ select USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI
config DCACHE_RAM_BASE
default 0xfef00000