summaryrefslogtreecommitdiff
path: root/src/soc/intel/fsp_broadwell_de
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@gmail.com>2018-03-29 14:59:57 +0200
committerNico Huber <nico.h@gmx.de>2018-06-30 09:02:56 +0000
commit7866d497ad20095cfd53b336bf9774e28a683890 (patch)
treea3cf2c31aef5063da0496a140227b96904f8c35e /src/soc/intel/fsp_broadwell_de
parenta6b3b4dd8f52cf488263253eeac040574432cee2 (diff)
arch/x86/acpi: Add DMAR RMRR helper functions
Add DMAR RMRR table entry and helper functions, using the existing DRHD functions as a model. As the DRHD device scope (DS) functions aren't DRHD-specific, genericize them to be used with RMRR tables as well. Correct DRHD bar size to match table entry in creator function, as noted in comments from patchset below. Adapted from/supersedes https://review.coreboot.org/25445 Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27269 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de')
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 0b32388117..38b4d47d51 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -331,12 +331,12 @@ static unsigned long acpi_fill_dmar(unsigned long current)
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, vtbar);
/* The IIO I/O APIC is fixed on PCI 00:05.4 on Broadwell-DE */
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
9, 0, 5, 4);
/* Get the PCI BDF for the PCH I/O APIC */
dev = dev_find_slot(0, LPC_DEV_FUNC);
bdf = pci_read_config16(dev, 0x6c);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
8, (bdf >> 8), PCI_SLOT(bdf), PCI_FUNC(bdf));
/*
@@ -365,7 +365,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
/* Create one HPET entry in DMAR for every unique HPET PCI path. */
for (i = 0; i < ARRAY_SIZE(hpet_bdf); i++) {
if (hpet_bdf[i])
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, (hpet_bdf[i] >> 8), PCI_SLOT(hpet_bdf[i]),
PCI_FUNC(hpet_bdf[i]));
}
@@ -380,7 +380,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
dev = dev_find_class(PCI_CLASS_BRIDGE_PCI << 8, dev);
if (dev && dev->bus->secondary == 0 &&
PCI_SLOT(dev->path.pci.devfn) <= 3)
- current += acpi_create_dmar_drhd_ds_pci_br(current,
+ current += acpi_create_dmar_ds_pci_br(current,
dev->bus->secondary,
PCI_SLOT(dev->path.pci.devfn),
PCI_FUNC(dev->path.pci.devfn));